Studying at the University of Verona

Here you can find information on the organisational aspects of the Programme, lecture timetables, learning activities and useful contact details for your time at the University, from enrolment to graduation.

This information is intended exclusively for students already enrolled in this course.
If you are a new student interested in enrolling, you can find information about the course of study on the course page:

Laurea magistrale in Ingegneria e scienze informatiche - Enrollment from 2025/2026

The Study Plan includes all modules, teaching and learning activities that each student will need to undertake during their time at the University.
Please select your Study Plan based on your enrollment year.

CURRICULUM TIPO:

1° Year 

ModulesCreditsTAFSSD
12
B
ING-INF/05
6
B
ING-INF/05
6
B
ING-INF/05
12
B
ING-INF/05
6
B
ING-INF/05

2° Year   activated in the A.Y. 2010/2011

ModulesCreditsTAFSSD
6
B
INF/01
Altre attivita' formative
4
F
-
ModulesCreditsTAFSSD
12
B
ING-INF/05
6
B
ING-INF/05
6
B
ING-INF/05
12
B
ING-INF/05
6
B
ING-INF/05
activated in the A.Y. 2010/2011
ModulesCreditsTAFSSD
6
B
INF/01
Altre attivita' formative
4
F
-
Modules Credits TAF SSD
Between the years: 1°- 2°

Legend | Type of training activity (TTA)

TAF (Type of Educational Activity) All courses and activities are classified into different types of educational activities, indicated by a letter.




S Placements in companies, public or private institutions and professional associations

Teaching code

4S02911

Coordinator

Franco Fummi

Credits

6

Also offered in courses:

  • Real-time systems of the course Bachelor's degree in Multimedia Information Technology (until 2008-2009)

Language

Italian

Scientific Disciplinary Sector (SSD)

ING-INF/05 - INFORMATION PROCESSING SYSTEMS

Period

2nd Semester dal Mar 1, 2010 al Jun 15, 2010.

Learning outcomes

The aim of this course is the presentation of some design automation techniques for embedded systems covering the entire design flow through modeling, verification, synthesis and testing. The most important design languages are introduced such as the most advanced EDA tools.

Program

Introduction to embedded systems.

Embedded systems modeling.

Embedded systems design alternatives.

System-level design.

Transactional Level Modeling (TLM) by using SystemC.

Assertion-based verification.

Platform-based design.

Embedded software design.

HW/SW/NET co-simulation.

Register transfer level (RTL) hardware description languages (VHDL/SystemC).

Automatic synthesis from RTL designs.

The problem of testing.

The problem of dependability.

Reference texts
Author Title Publishing house Year ISBN Notes
Franco Fummi, Mariagiovanna Sami, Cristina Silvano Progettazione Digitale (Edizione 2) McGraw-Hill 2007 8838663521

Examination Methods

Written examination and practical design.

Students with disabilities or specific learning disorders (SLD), who intend to request the adaptation of the exam, must follow the instructions given HERE

Teaching materials e documents