Studying at the University of Verona
Here you can find information on the organisational aspects of the Programme, lecture timetables, learning activities and useful contact details for your time at the University, from enrolment to graduation.
Study Plan
This information is intended exclusively for students already enrolled in this course.If you are a new student interested in enrolling, you can find information about the course of study on the course page:
Laurea magistrale in Ingegneria e scienze informatiche - Enrollment from 2025/2026The Study Plan includes all modules, teaching and learning activities that each student will need to undertake during their time at the University.
Please select your Study Plan based on your enrollment year.
1° Year
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2° Year activated in the A.Y. 2011/2012
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Tre insegnamenti a scelta tra i seguenti
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Tre insegnamenti a scelta tra i seguenti
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Legend | Type of training activity (TTA)
TAF (Type of Educational Activity) All courses and activities are classified into different types of educational activities, indicated by a letter.
Embedded systems design (2010/2011)
Teaching code
4S02911
Teacher
Coordinator
Credits
6
Also offered in courses:
- Real-time systems of the course Bachelor's degree in Multimedia Information Technology (until 2008-2009)
Language
Italian
Scientific Disciplinary Sector (SSD)
ING-INF/05 - INFORMATION PROCESSING SYSTEMS
Period
II semestre dal Mar 1, 2011 al Jun 15, 2011.
Learning outcomes
The aim of this course is the presentation of some design automation techniques for embedded systems covering the entire design flow through modeling, verification, synthesis and testing. The most important design languages are introduced such as the most advanced EDA tools.
Program
Introduction to embedded systems.
Embedded systems modeling.
Embedded systems design alternatives.
System-level design.
Transactional Level Modeling (TLM) by using SystemC.
Assertion-based verification.
Platform-based design.
Embedded software design.
HW/SW/NET co-simulation.
Register transfer level (RTL) hardware description languages (VHDL/SystemC).
Automatic synthesis from RTL designs.
The problem of testing.
The problem of dependability.
Author | Title | Publishing house | Year | ISBN | Notes |
---|---|---|---|---|---|
Daniel D. Gajski | Embedded system design: modeling, synthesis and verification | Springer | 2009 | 978-1-4419-0504-8 | Methodologies and languages for embedded systems design |
Franco Fummi, Mariagiovanna Sami, Cristina Silvano | Progettazione Digitale (Edizione 2) | McGraw-Hill | 2007 | 8838663521 | In relazione alla progettazione basata su HDL |
William Fornaciari, Carlo Brandolese | Sistemi Embedded - sviluppo hardware e software per sistemi dedicati (Edizione 1) | Pearson Education Italia | 2007 | 9788871923420 | Descrizione generale della progettazione di sistemi embedded |
Examination Methods
Written examination and practical design.
Teaching materials e documents
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Presentazione corso (pdf, it, 1425 KB, 3/3/11)
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Programma Dettagliato II Semestre (html, it, 42 KB, 5/19/11)