Studying at the University of Verona
Here you can find information on the organisational aspects of the Programme, lecture timetables, learning activities and useful contact details for your time at the University, from enrolment to graduation.
Academic calendar
The academic calendar shows the deadlines and scheduled events that are relevant to students, teaching and technical-administrative staff of the University. Public holidays and University closures are also indicated. The academic year normally begins on 1 October each year and ends on 30 September of the following year.
Course calendar
The Academic Calendar sets out the degree programme lecture and exam timetables, as well as the relevant university closure dates..
Period | From | To |
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I semestre | Oct 4, 2010 | Jan 31, 2011 |
II semestre | Mar 1, 2011 | Jun 15, 2011 |
Session | From | To |
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Sessione straordinaria | Feb 1, 2011 | Feb 28, 2011 |
Sessione estiva | Jun 16, 2011 | Jul 29, 2011 |
Sessione autunnale | Sep 1, 2011 | Sep 30, 2011 |
Session | From | To |
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Sessione autunnale | Oct 21, 2010 | Oct 21, 2010 |
Sessione straordinaria | Dec 15, 2010 | Dec 15, 2010 |
Sessione invernale | Mar 24, 2011 | Mar 24, 2011 |
Sessione estiva | Jul 19, 2011 | Jul 19, 2011 |
Period | From | To |
---|---|---|
All Saints | Nov 1, 2010 | Nov 1, 2010 |
National holiday | Dec 8, 2010 | Dec 8, 2010 |
Christmas holidays | Dec 22, 2010 | Jan 6, 2011 |
Easter holidays | Apr 22, 2011 | Apr 26, 2011 |
National holiday | Apr 25, 2011 | Apr 25, 2011 |
Labour Day | May 1, 2011 | May 1, 2011 |
Local holiday | May 21, 2011 | May 21, 2011 |
National holiday | Jun 2, 2011 | Jun 2, 2011 |
Summer holidays | Aug 8, 2011 | Aug 15, 2011 |
Exam calendar
Exam dates and rounds are managed by the relevant Science and Engineering Teaching and Student Services Unit.
To view all the exam sessions available, please use the Exam dashboard on ESSE3.
If you forgot your login details or have problems logging in, please contact the relevant IT HelpDesk, or check the login details recovery web page.
Academic staff
Study Plan
The Study Plan includes all modules, teaching and learning activities that each student will need to undertake during their time at the University. Please select your Study Plan based on your enrolment year.
Modules | Credits | TAF | SSD |
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Modules | Credits | TAF | SSD |
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1° Year
Modules | Credits | TAF | SSD |
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2° Year activated in the A.Y. 2011/2012
Modules | Credits | TAF | SSD |
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Modules | Credits | TAF | SSD |
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Legend | Type of training activity (TTA)
TAF (Type of Educational Activity) All courses and activities are classified into different types of educational activities, indicated by a letter.
The Physics of Integrated Devices (2011/2012)
Teaching code
4S00034
Teacher
Coordinatore
Credits
6
Language
Italian
Scientific Disciplinary Sector (SSD)
FIS/01 - EXPERIMENTAL PHYSICS
Period
I semestre dal Oct 3, 2011 al Jan 31, 2012.
Courses Single
Authorized
Learning outcomes
Aim of the course is to give knowledge of the physics of semiconductor devices (p-n junction, MOSFET, CMOS; BJT) and related logic gates. The student will be able to compare various logic families in terms of their physical characteristics and performances.
Program
Recall of Classical and Atomic Physics: work and energy, electric field, potential and potential energy, electric current, Ohm's law, linear circuits, resistivity and temperature dependence in metals and semiconductors, Bohr atom, table of elements
Crystal structure and electric conduction in metals and semiconductors: electron gas model of metals, conduction current in metals; covalent bond in semiconductors and the concept of hole, doped semiconductors, band theory, conduction and diffusion current in semiconductors
p-n junction: polarized and non polarized junction, I-V characteristics in direct and reverse polarization for Si and Ge, breakdown, junction diode, Zener diodes, OR/AND gates with diodes, commutation time
FET transistors: enrichment and depletion MOSFET, NMOS and PMOS. MOSFET inverters, CMOS, noise margins and commutation times
BJT transistors and RTL inverter: common emitter configuration, RTL inverter, noise margins, commutation times
Elementary digital circuits: basic gates in MOS and bipolar technologies: NOR and NAND MOS, NOR and NAND CMOS, NAND DTL, NAND HTL, NAND TTL; OR/NOR ECL
Comparison of logic families: propagation delay, power dissipation, noise margins, fan-out
Laboratory activities: logic gates study and characterization by Spice
Examination Methods
Oral
Teaching materials e documents
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Dispense laboratorio (zip, it, 1683 KB, 21/11/11)
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Dispense teoria (zip, it, 7214 KB, 21/11/11)
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Errata corrige teoria (rtf, it, 4 KB, 21/11/11)
Type D and Type F activities
Modules not yet included
Career prospects
Module/Programme news
News for students
There you will find information, resources and services useful during your time at the University (Student’s exam record, your study plan on ESSE3, Distance Learning courses, university email account, office forms, administrative procedures, etc.). You can log into MyUnivr with your GIA login details: only in this way will you be able to receive notification of all the notices from your teachers and your secretariat via email and soon also via the Univr app.
Graduation
Deadlines and administrative fulfilments
For deadlines, administrative fulfilments and notices on graduation sessions, please refer to the Graduation Sessions - Science and Engineering service.
Need to activate a thesis internship
For thesis-related internships, it is not always necessary to activate an internship through the Internship Office. For further information, please consult the dedicated document, which can be found in the 'Documents' section of the Internships and work orientation - Science e Engineering service.
Final examination regulations
List of theses and work experience proposals
Erasmus+ and other experiences abroad
Attendance
As stated in the Teaching Regulations for the A.Y. 2022/2023, attendance at the course of study is not mandatory.
Please refer to the Crisis Unit's latest updates for the mode of teaching.