Studying at the University of Verona
Here you can find information on the organisational aspects of the Programme, lecture timetables, learning activities and useful contact details for your time at the University, from enrolment to graduation.
Academic calendar
The academic calendar shows the deadlines and scheduled events that are relevant to students, teaching and technical-administrative staff of the University. Public holidays and University closures are also indicated. The academic year normally begins on 1 October each year and ends on 30 September of the following year.
Course calendar
The Academic Calendar sets out the degree programme lecture and exam timetables, as well as the relevant university closure dates..
| Period | From | To |
|---|---|---|
| I sem. | Oct 1, 2014 | Jan 30, 2015 |
| II sem. | Mar 2, 2015 | Jun 12, 2015 |
| Session | From | To |
|---|---|---|
| Sessione straordinaria appelli d'esame | Feb 2, 2015 | Feb 27, 2015 |
| Sessione estiva appelli d'esame | Jun 15, 2015 | Jul 31, 2015 |
| Sessione autunnale appelli d'esame | Sep 1, 2015 | Sep 30, 2015 |
| Session | From | To |
|---|---|---|
| Sessione invernale appello di laurea 2015 | Mar 19, 2015 | Mar 19, 2015 |
| Sessione estiva appello di laurea 2015 | Jul 15, 2015 | Jul 15, 2015 |
| Sessione autunnale appello di laurea 2015 | Oct 21, 2015 | Oct 21, 2015 |
| Sessione invernale appello di laurea 2016 | Mar 17, 2016 | Mar 17, 2016 |
| Period | From | To |
|---|---|---|
| Vacanze di Natale | Dec 22, 2014 | Jan 6, 2015 |
| Vacanze di Pasqua | Apr 2, 2015 | Apr 7, 2015 |
| Ricorrenza del Santo Patrono | May 21, 2015 | May 21, 2015 |
| Vacanze estive | Aug 10, 2015 | Aug 16, 2015 |
Exam calendar
Exam dates and rounds are managed by the relevant Science and Engineering Teaching and Student Services Unit.
To view all the exam sessions available, please use the Exam dashboard on ESSE3.
If you forgot your login details or have problems logging in, please contact the relevant IT HelpDesk, or check the login details recovery web page.
Should you have any doubts or questions, please check the Enrolment FAQs
Academic staff
Study Plan
The Study Plan includes all modules, teaching and learning activities that each student will need to undertake during their time at the University. Please select your Study Plan based on your enrolment year.
| Modules | Credits | TAF | SSD |
|---|
| Modules | Credits | TAF | SSD |
|---|
1° Year
| Modules | Credits | TAF | SSD |
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2° Year
| Modules | Credits | TAF | SSD |
|---|
| Modules | Credits | TAF | SSD |
|---|
Legend | Type of training activity (TTA)
TAF (Type of Educational Activity) All courses and activities are classified into different types of educational activities, indicated by a letter.
The Physics of Integrated Devices (2014/2015)
Teaching code
4S00034
Teacher
Coordinatore
Credits
6
Language
Italian
Scientific Disciplinary Sector (SSD)
FIS/01 - EXPERIMENTAL PHYSICS
Period
I sem. dal Oct 1, 2014 al Jan 30, 2015.
Learning outcomes
Aim of the course is to give knowledge of the physics of semiconductor devices (p-n junction, BJT, JFET, MOSFET, CMOS) and related logic gates. The student will be able to compare various practical devices in terms of their physical characteristics and performances.
Program
Recall of Classical and Atomic Physics: work and energy, electric field, potential and potential energy, electric current, Ohm's law, linear circuits, resistivity and temperature dependence in metals and semiconductors, Bohr atom, table of elements
Crystal structure and electric conduction in metals and semiconductors: electron gas model of metals, conduction current in metals; covalent bond in semiconductors and the concept of hole, doped semiconductors, band theory, conduction and diffusion current in semiconductors
p-n junction: polarized and non polarized junction, I-V characteristics in direct and reverse polarization for Si and Ge, breakdown, junction diode, Zener diodes, OR/AND gates with diodes, commutation time
BJT transistors : common emitter configuration and common base configuration, RTL inverter, noise margins, commutation times
JFET transistors: enrichment and depletion MOSFET, NMOS and PMOS. MOSFET inverters, CMOS, noise margins and commutation times
Elementary digital circuits: basic gates in MOS and bipolar technologies: NOR and NAND MOS, NOR and NAND CMOS.
Optoelectronic devices and displays.
Laboratory activities: logic gates study and characterization by Micro-cap
Examination Methods
Oral presentation and written research work on one of the topics presented during the course.
Teaching materials
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Calendario e programma del corso
(html, it, 112 KB, 02/12/14)
Type D and Type F activities
Modules not yet included
Career prospects
Module/Programme news
News for students
There you will find information, resources and services useful during your time at the University (Student’s exam record, your study plan on ESSE3, Distance Learning courses, university email account, office forms, administrative procedures, etc.). You can log into MyUnivr with your GIA login details.
Further services
I servizi e le attività di orientamento sono pensati per fornire alle future matricole gli strumenti e le informazioni che consentano loro di compiere una scelta consapevole del corso di studi universitario.
Graduation
List of theses and work experience proposals
Attendance
As stated in point 25 of the Teaching Regulations for the A.Y. 2021/2022, attendance at the course of study is not mandatory.Please refer to the Crisis Unit's latest updates for the mode of teaching.
