Studying at the University of Verona
Here you can find information on the organisational aspects of the Programme, lecture timetables, learning activities and useful contact details for your time at the University, from enrolment to graduation.
Academic calendar
The academic calendar shows the deadlines and scheduled events that are relevant to students, teaching and technical-administrative staff of the University. Public holidays and University closures are also indicated. The academic year normally begins on 1 October each year and ends on 30 September of the following year.
Course calendar
The Academic Calendar sets out the degree programme lecture and exam timetables, as well as the relevant university closure dates..
| Period | From | To |
|---|---|---|
| I semestre | Oct 1, 2018 | Jan 31, 2019 |
| II semestre | Mar 4, 2019 | Jun 14, 2019 |
| Session | From | To |
|---|---|---|
| Sessione invernale d'esame | Feb 1, 2019 | Feb 28, 2019 |
| Sessione estiva d'esame | Jun 17, 2019 | Jul 31, 2019 |
| Sessione autunnale d'esame | Sep 2, 2019 | Sep 30, 2019 |
| Session | From | To |
|---|---|---|
| Sessione Estiva | Jul 18, 2019 | Jul 18, 2019 |
| Sessione Autunnale | Oct 17, 2019 | Oct 17, 2019 |
| Sessione Invernale | Mar 18, 2020 | Mar 18, 2020 |
| Period | From | To |
|---|---|---|
| Sospensione dell'attività didattica | Nov 2, 2018 | Nov 3, 2018 |
| Vacanze di Natale | Dec 24, 2018 | Jan 6, 2019 |
| Vacanze di Pasqua | Apr 19, 2019 | Apr 28, 2019 |
| Festa del Santo Patrono | May 21, 2019 | May 21, 2019 |
| Vacanze estive | Aug 5, 2019 | Aug 18, 2019 |
Exam calendar
Exam dates and rounds are managed by the relevant Science and Engineering Teaching and Student Services Unit.
To view all the exam sessions available, please use the Exam dashboard on ESSE3.
If you forgot your login details or have problems logging in, please contact the relevant IT HelpDesk, or check the login details recovery web page.
Should you have any doubts or questions, please check the Enrolment FAQs
Academic staff
Study Plan
The Study Plan includes all modules, teaching and learning activities that each student will need to undertake during their time at the University. Please select your Study Plan based on your enrolment year.
| Modules | Credits | TAF | SSD |
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| Modules | Credits | TAF | SSD |
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1° Year
| Modules | Credits | TAF | SSD |
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2° Year
| Modules | Credits | TAF | SSD |
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| Modules | Credits | TAF | SSD |
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Legend | Type of training activity (TTA)
TAF (Type of Educational Activity) All courses and activities are classified into different types of educational activities, indicated by a letter.
Automated System Verification (2018/2019)
Teaching code
4S003252
Teacher
Coordinatore
Credits
6
Language
Italian
Scientific Disciplinary Sector (SSD)
INF/01 - INFORMATICS
Period
II semestre dal Mar 4, 2019 al Jun 14, 2019.
Learning outcomes
The course aims to provide the theoretical basis of the main techniques of specification and verification of finite-state systems. In particular, with reference to transition systems, trace-based techniques, linear time logic and branched-time logic.
At the end of the course the student will have to demonstrate that he has acquired the knowledge necessary to formally reason on finite-state systems, with emphasis on the problems of correctness solved automatically (model-checking), through logical operational methods (traces) (temporal logics) and algorithms.
This knowledge will enable the student to: i) specify and formally test properties of correctness of simple systems presented as transition systems; ii) use time logics (linear and branched) for the specification of properties; iii) master semantic methods for temporal logics.
At the end of the course the student will be able to: i) compare temporal logics for the automatic verification and choose from these the most appropriate according to the context of use; when defining a verification process make the most appropriate design choices; ii) continue the studies independently in the context of formal verification.
Program
System Verification:
the model checking approach
Modelling Concurrent Systems:
transition Systems,
parallelism and communication,
state-space xplosion
Linear-Time Properties:
safety and invariants,
liveness,
fairness
Linear Temporal Logic:
syntax,
semantics,
fairness,
model checking
Computation Tree Logic:
syntax,
semantics,
expressiveness of CTL vs. LTL,
fairness,
symbolic model checking,
CTL∗
Equivalences and Abstraction:
bisimulation ,
bisimulation and CTL∗ equivalence
| Author | Title | Publishing house | Year | ISBN | Notes |
|---|---|---|---|---|---|
| Christel Baier and Joost-Pieter Katoen | Principles of Model Checking | MIT press | 2008 |
Examination Methods
Written exam (one and a half hours to perform the task).
In order to pass the exam, the student must have sufficient knowledge of all the topics (including the proofs of the theorems) and the ability to solve exercises similar to those seen during the lessons.
Better is the knowledge of course topics, better is the result of exam.
Bibliography
Type D and Type F activities
Modules not yet included
Career prospects
Module/Programme news
News for students
There you will find information, resources and services useful during your time at the University (Student’s exam record, your study plan on ESSE3, Distance Learning courses, university email account, office forms, administrative procedures, etc.). You can log into MyUnivr with your GIA login details.
Further services
I servizi e le attività di orientamento sono pensati per fornire alle future matricole gli strumenti e le informazioni che consentano loro di compiere una scelta consapevole del corso di studi universitario.
Graduation
List of theses and work experience proposals
Attendance
As stated in point 25 of the Teaching Regulations for the A.Y. 2021/2022, attendance at the course of study is not mandatory.Please refer to the Crisis Unit's latest updates for the mode of teaching.
