Studying at the University of Verona
Here you can find information on the organisational aspects of the Programme, lecture timetables, learning activities and useful contact details for your time at the University, from enrolment to graduation.
Study Plan
This information is intended exclusively for students already enrolled in this course.If you are a new student interested in enrolling, you can find information about the course of study on the course page:
Laurea in Bioinformatica - Enrollment from 2025/2026The Study Plan includes all modules, teaching and learning activities that each student will need to undertake during their time at the University.
Please select your Study Plan based on your enrollment year.
1° Year
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2° Year activated in the A.Y. 2021/2022
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1 module among the following3° Year activated in the A.Y. 2022/2023
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Legend | Type of training activity (TTA)
TAF (Type of Educational Activity) All courses and activities are classified into different types of educational activities, indicated by a letter.
HW components design on FPGA (2021/2022)
Teaching code
4S010209
Teacher
Coordinator
Credits
3
Also offered in courses:
- HW components design on FPGA of the course Bachelor's degree in Computer Science
- HW components design on FPGA of the course Master's degree in Computer Science and Engineering
- HW components design on FPGA of the course Master's degree in Medical Bioinformatics
- HW components design on FPGA of the course Master's degree in Computer Engineering for Robotics and Smart Industry
Language
Italian
Scientific Disciplinary Sector (SSD)
ING-INF/05 - INFORMATION PROCESSING SYSTEMS
Period
Secondo semestre dal Mar 7, 2022 al Jun 10, 2022.
Learning outcomes
The course aims at providing preliminary notions of the
design of hardware systems. In particular, it aims at providing
an introduction to the Verilog hardware description language,
and the prototyping using FPGAs.
Program
- A brief history of Electronic Design Automation.
- Introduction to Hardware Description Languages.
- Introduction to Verilog.
- Automatic synthesis of HW components.
- FPGA prototyping.
Examination Methods
The final exam consists of an individual or group project.
For the exam organization, please, contact:
- Stefano Spellini
- Sebastiano Gaiardelli
Subscribe for the selection by Feb. 24 2022 at the link:
https://forms.office.com/r/VwjqR5wHr5
