Studying at the University of Verona
Here you can find information on the organisational aspects of the Programme, lecture timetables, learning activities and useful contact details for your time at the University, from enrolment to graduation.
Study Plan
The Study Plan includes all modules, teaching and learning activities that each student will need to undertake during their time at the University.
Please select your Study Plan based on your enrollment year.
1° Year
| Modules | Credits | TAF | SSD |
|---|
Linear algebra and analysis
2° Year activated in the A.Y. 2026/2027
| Modules | Credits | TAF | SSD |
|---|
3° Year It will be activated in the A.Y. 2027/2028
| Modules | Credits | TAF | SSD |
|---|
| Modules | Credits | TAF | SSD |
|---|
Linear algebra and analysis
| Modules | Credits | TAF | SSD |
|---|
| Modules | Credits | TAF | SSD |
|---|
| Modules | Credits | TAF | SSD |
|---|
One module to be chosen among:
- 2nd year - Discrete Biological Models - delivered in 2026/2027
- 3rd year - Database technologies, Advanced machine learning techniques for biomedical data, Network programming, Signal and image processing II - delivered in 2027/2028One module to be chosen among:
- 2nd year - Elements of physiology, Biophysics - delivered in 2026/2027
- 3rd year - Model organism in biotechnology research, Molecular biology laboratory - delivered in 2027/2028Legend | Type of training activity (TTA)
TAF (Type of Educational Activity) All courses and activities are classified into different types of educational activities, indicated by a letter.
Introduction to computer architecture (2025/2026)
Teaching code
4S008224
Credits
6
Language
Italian
Scientific Disciplinary Sector (SSD)
ING-INF/05 - INFORMATION PROCESSING SYSTEMS
Courses Single
Authorized
The teaching is organized as follows:
Teoria
Laboratorio
Learning objectives
The aim of the course is to provide the theory and practice to implement an algorithm in hardware, exploring a spectrum of options ranging from dedicated specialized devices to programs on a gene-ral-purpose processor. The students will understand how a processor works and how a high-level program is translated into machine language and then executed. At the end of the course, the students will be able to design specialized hardware for simple algo-rithms; translate simple programs from an high-level specification to machine language
Prerequisites and basic notions
Nothing
Program
---------
Theory
---------
- Information representation
- Representation of numbers in base 2: Magnitude only, Sign&Magnitude, 2's Complement, fixed and floating point, hexadecimal notation
- Combinatorial logic: truth tables, Boolean algebra, and logic gates
- Incompletely specified functions
- Construction of combinatorial systems by functional design
- Performance criteria of combinatorial modules: logic gates and literals, area, delay, power consumption
- Minterms, prime implicants, and essential implicants
- Logic minimization using Karnaugh maps (with fully specified and incompletely specified functions)
- Construction of combinatorial systems by structural design: rules, bit-wise logic gates, comparators, arithmetic modules, multiplexers, decoders, shifters
- Sequential systems
- Finite state machines: state diagram, state table, transition table, synthesis of state and output update logic
- Memory cell and registers
- Construction of sequential systems by functional design
- State minimization and its impact on logic synthesis
- Building sequential systems through structural design: arithmetic logic units and counters, controller/data-path approach
- Performance of a digital system: area, delay, power consumption
- Parallelism schemes: pipelines and farms
- Processor architecture: control unit and execution unit
- Fetch-decode-execute instruction cycle
- Fundamental registers
- Classification of instructions: arithmetic logic, memory access, and flow control
- Interaction with input/output units
- Software performance: memory, execution time
- Alternatives for implementing an algorithm: using dedicated hardware or software
-----------------
Laboratory
-----------------
- LC-3 processor architecture
- Writing assembly language programs for LC-3
Bibliography
Didactic methods
The course is organized into lectures, exercises, and practical computer activities.
Learning assessment procedures
The exam consists of two parts:
- a written test on the Theory part, lasting a maximum of 2 hours, containing open-ended questions and theoretical exercises;
- a written test on the Laboratory part, lasting a maximum of 2 hours, on programming in the machine language of the LC-3 architecture.
Evaluation criteria
To pass the exam, students must demonstrate:
- understanding the principles underlying the digital implementation of an algorithm;
- being able to perform exercises on the representation of numbers in Base 2;
- being able to design simple combinatorial and sequential modules;
- being able to write simple assembly programs for LC-3;
- understanding the basic architecture of a processor using the LC-3 as an example;
- being able to evaluate the main performance aspects of the hardware and software implementations of an algorithm;
- being able to present their arguments precisely and coherently without digressions.
Criteria for the composition of the final grade
The exam is considered passed when both the theory and laboratory sections are passed. The theory test score accounts for 3/4 of the final grade, and the laboratory test score (LC-3 programming) accounts for 1/4. The history of the best scores for both theory and laboratory tests is maintained across the various exam sessions, so it is possible to keep a previous score but try to improve by taking a new test.
Exam language
Italiano
