Studying at the University of Verona

Here you can find information on the organisational aspects of the Programme, lecture timetables, learning activities and useful contact details for your time at the University, from enrolment to graduation.

This information is intended exclusively for students already enrolled in this course.
If you are a new student interested in enrolling, you can find information about the course of study on the course page:

Laurea in Bioinformatica - Enrollment from 2025/2026
Le attività formative in ambito D o F comprendono gli insegnamenti impartiti presso l'Università di Verona o periodi di stage/tirocinio professionale.
Nella scelta delle attività di tipo D, gli studenti dovranno tener presente che in sede di approvazione si terrà conto della coerenza delle loro scelte con il progetto formativo del loro piano di studio e dell'adeguatezza delle motivazioni eventualmente fornite.

 
Academic year:
I semestre From 10/1/20 To 1/29/21
years Modules TAF Teacher
Matlab-Simulink programming D Bogdan Mihai Maris (Coordinator)
II semestre From 3/1/21 To 6/11/21
years Modules TAF Teacher
Introduction to 3D printing D Franco Fummi (Coordinator)
Python programming language D Vittoria Cozza (Coordinator)
HW components design on FPGA D Franco Fummi (Coordinator)
Rapid prototyping on Arduino D Franco Fummi (Coordinator)
Protection of intangible assets (SW and invention)between industrial law and copyright D Roberto Giacobazzi (Coordinator)
List of courses with unassigned period
years Modules TAF Teacher
Subject requirements: mathematics D Rossana Capuani
The fashion lab (1 ECTS) D Maria Caterina Baruffi (Coordinator)
LaTeX Language D Enrico Gregorio (Coordinator)

Teaching code

4S010209

Coordinator

Franco Fummi

Credits

3

Also offered in courses:

Language

Italian

Scientific Disciplinary Sector (SSD)

NN - -

Period

II semestre dal Mar 1, 2021 al Jun 11, 2021.

Learning outcomes

The course aims at providing preliminary notions of the
design of hardware systems. In particular, it aims at providing
an introduction to the Verilog hardware description language,
and the prototyping using FPGAs.

Program

- A brief history of Electronic Design Automation.
- Introduction to Hardware Description Languages.
- Introduction to Verilog.
- Automatic synthesis of HW components.
- FPGA prototyping.

Examination Methods

The final exam consists of an individual or group project.

For the exam organization, please, contact:
- Michele Lora <michele.lora@univr.it>
- Stefano Spellini <stefano.spellini@univr.it>

Students with disabilities or specific learning disorders (SLD), who intend to request the adaptation of the exam, must follow the instructions given HERE