Teaching code

4S008224

Credits

6

Coordinator

Davide Quaglia

Language

Italian

Scientific Disciplinary Sector (SSD)

ING-INF/05 - INFORMATION PROCESSING SYSTEMS

Courses Single

Authorized

Moodle Seminars 0

The teaching is organized as follows:

Learning objectives

The aim of the course is to provide the theory and practice to implement an algorithm in hardware, exploring a spectrum of options ranging from dedicated specialized devices to programs on a gene-ral-purpose processor. The students will understand how a processor works and how a high-level program is translated into machine language and then executed. At the end of the course, the students will be able to design specialized hardware for simple algo-rithms; translate simple programs from an high-level specification to machine language

Prerequisites and basic notions

No prerequisites

Program

Theory
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- Information representation
- Binary representation of numbers: two's complement, fixed and floating point representation, hexadecimal notation
- Combinatorial circuits: truth tables, Boolean algebra and logic gates
- Axioms and theorems of Boolean algebra
- Incompletely specified functions
- Minterms, prime implicants, and essential implicants
- Logical minimization using Karnaugh maps
- Construction of combinatorial modules by structural design: rules, bit-wise logic gates, comparators, arithmetic modules, multiplexers, decoders, shifters
- Performance of a combinatorial module: literals, logic gates, area, delay
- Sequential circuits
- Finite state machines: state diagram, state table, transition table, synthesis of state and output update logic
- Memory cells and registers
- State minimization and its impact on logic synthesis
- Structural design of sequential modules: arithmetic-logical units and counters
- Controller/data-path approach
- Performance of sequential modules: area, delay, consumption
- Parallelism schemes: pipelines and farms
- Design methodologies of a digital system
- Architecture of a processor: control unit and execution unit
- Fetch-decode-execute cycle of an instruction
- Types of instructions and fundamental registers
- Interaction with input-output units
- Execution cycles of register addition operations, reading/writing from/to memory, jumping
- Implementation of an algorithm using dedicated hardware or software
Laboratory
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- Architecture of the LC-3 processor
- Writing programs in Assembly language for LC-3

Bibliography

Didactic methods

The course is organized in lectures, exercises and practical computer activities.

Learning assessment procedures

The exam consists of two parts:
- a written test containing questions and exercises related to Theory;
- a written programming test related to the machine language of the LC-3 architecture.

Evaluation criteria

To pass the exam, students must demonstrate that they:
- have understood the principles underlying the digital implementation of an algorithm;
- know how to perform exercises on the binary representation of numbers;
- know how to design simple combinatorial and sequential circuits;
- know how to write simple Assembly programs for LC-3.

Criteria for the composition of the final grade

The theory test grade contributes 3/4 of the final grade, and the programming test grade for LC-3 contributes 1/4.

Exam language

Italiano

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