Studying at the University of Verona
Here you can find information on the organisational aspects of the Programme, lecture timetables, learning activities and useful contact details for your time at the University, from enrolment to graduation.
Study Plan
This information is intended exclusively for students already enrolled in this course.If you are a new student interested in enrolling, you can find information about the course of study on the course page:
Laurea in Informatica - Enrollment from 2025/2026The Study Plan includes all modules, teaching and learning activities that each student will need to undertake during their time at the University.
Please select your Study Plan based on your enrollment year.
1° Year
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2° Year activated in the A.Y. 2016/2017
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One course to be chosen among the following
3° Year activated in the A.Y. 2017/2018
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Modules | Credits | TAF | SSD |
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One course to be chosen among the following
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Legend | Type of training activity (TTA)
TAF (Type of Educational Activity) All courses and activities are classified into different types of educational activities, indicated by a letter.
Computer Architecture (2015/2016)
Teaching code
4S00011
Credits
12
Language
Italian
Scientific Disciplinary Sector (SSD)
ING-INF/05 - INFORMATION PROCESSING SYSTEMS
The teaching is organized as follows:
Teoria
Laboratorio [II turno M-Z]
Laboratorio [I turno A-L]
Esercitazioni
Learning outcomes
This course presents the theoretical and practical knowledge to implement an algorithm into a digital architecture. Some design alternatives are presented ranging from a pure software, running on a general purpose computer, to an ad-hoc hardware implementation. This design knowledge is fundamental for understanding in depth all mechanisms on the base of any information computing system and all steps of a compilation chain transforming an high-level programming language into machine-level code.
Program
Fundamentals: information coding, Boolean functions, arithmetic.
Digital devices design: combinational circuits, sequential circuits, controller-datapath circuits, programmable units.
Computer architecture: basic principles, instruction set, elaboration unit, memory hierarchy, I/O organization, actual architectures, parallel architectures.
Practical exercises: automatic design of a programmable system, assembly programming of the Intel 80X86 architecture.
Bibliography
Activity | Author | Title | Publishing house | Year | ISBN | Notes |
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Teoria | C. Hamacher, Z. Vranesic, S. Zaky, N. Manjikian | Introduzione all'architettura dei calcolatori (Edizione 1) | McGraw-Hill | 2012 | 9788838667510 | seconda parte del corso |
Teoria | Franco Fummi, Mariagiovanna Sami, Cristina Silvano | Progettazione Digitale (Edizione 2) | McGraw-Hill | 2007 | 8838663521 | prima parte del corso |
Examination Methods
Theory comprehension is checked through a written examination, eventually divided in parts that will be checked during each semester.
Practical skills are evaluated through two designs which can have a maximal impact of 4/30 on the final mark.
Theory without practical marks are preserved through examination sessions at the cost of a reduction.
Teaching materials e documents
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Orario Detagliato II semestre (it, 45 KB, 3/29/16)
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Orario Detagliato I semestre (it, 44 KB, 12/3/15)