Teaching code

4S009017

Academic staff

Franco Fummi, Graziano Pravadelli

Coordinator

Franco Fummi

Credits

6

Language

English

Scientific Disciplinary Sector (SSD)

INF/01 - INFORMATICS

Period

Primo semestre dal Oct 4, 2021 al Jan 28, 2022.

Lessons timetable Moodle Seminars 0

Learning outcomes

The course aims to train students in the field of algorithmic techniques, languages and automatic tools that underpin the verification and testing methodologies of complex digital and analog systems. In particular, the main objective of the course is to explain how it is possible to represent complex systems through virtual platforms in relation to their physical realization and to guarantee the functional safety and certification process of the devices that compose them. Upon completion of the course, the students must demonstrate that they have acquired the fundamental knowledge to understand the methodologies and tools necessary to verify and test complex analog / digital devices, to guarantee their functional safety, and to certify them. This knowledge will allow the students to: represent analog / digital systems in the form of virtual platforms; define verification methods based on dynamic and semi-formal techniques; develop approaches for testing and fault tolerance; use, integrate, and develop automatic tools for the modelling, verification and testing of analog / digital systems; activate certification processes. At the end of the course the students will have acquired the ability to: (i) carry out a group or personal laboratory project and present the results by motivating the choices with language appropriateness; (ii) continue autonomously the study and research in the field of verification, testing and certification of complex analog / digital systems by addressing advanced issues both in the industrial and scientific fields.

Program

A. Systems modeling and veriifcation
- SystemVerilog
- ABV introduction
- ABV - specification languages
- ABV - assertion automatic generation
- ABV - assertion qualification: coverage
- ABV - assertion qualification: vacuity
- ABV - assertion qualification: overspecification

B. Systems testing and certiifcation
- Faults-defects-errors definition
- Digital faults modeling
- Analog faults modeling
- verilog-AMS
- Systemc-AMS
- Gate-level simulation
- Fault simulation
- Combinational ATPG
- Sequantial ATPG
- Design for testability
- Self-testing circuits
- Fault tollerance
- Functional safety
- Certification for safety

Examination Methods

The exam is composed of two parts: theory and laboratory report.

The final exam consists of a written test containing questions and exercises.
A report of all laboratoty classes must be provided to complete the exam; this report can be sobstituted by a specific design potentially part of the final thesis.