Studying at the University of Verona
Here you can find information on the organisational aspects of the Programme, lecture timetables, learning activities and useful contact details for your time at the University, from enrolment to graduation.
Academic calendar
The academic calendar shows the deadlines and scheduled events that are relevant to students, teaching and technical-administrative staff of the University. Public holidays and University closures are also indicated. The academic year normally begins on 1 October each year and ends on 30 September of the following year.
Course calendar
The Academic Calendar sets out the degree programme lecture and exam timetables, as well as the relevant university closure dates..
| Period | From | To |
|---|---|---|
| I semestre | Oct 1, 2015 | Jan 29, 2016 |
| II semestre | Mar 1, 2016 | Jun 10, 2016 |
| Session | From | To |
|---|---|---|
| Sessione straordinaria Appelli d'esame | Feb 1, 2016 | Feb 29, 2016 |
| Sessione estiva Appelli d'esame | Jun 13, 2016 | Jul 29, 2016 |
| Sessione autunnale Appelli d'esame | Sep 1, 2016 | Sep 30, 2016 |
| Session | From | To |
|---|---|---|
| Sess. autun. App. di Laurea LM18-32 | Oct 21, 2015 | Oct 21, 2015 |
| Sess. invern. App. di Laurea LM18-32 | Mar 17, 2016 | Mar 17, 2016 |
| Sess. estiva App. di Laurea LM18-32 | Jul 13, 2016 | Jul 13, 2016 |
| Sess. autun 2016 App. di Laurea LM18-32 | Oct 19, 2016 | Oct 19, 2016 |
| Sess. invern. 2017 App. di Laurea-LM18-32 | Mar 21, 2017 | Mar 21, 2017 |
| Period | From | To |
|---|---|---|
| Festività dell'Immacolata Concezione | Dec 8, 2015 | Dec 8, 2015 |
| Vacanze di Natale | Dec 23, 2015 | Jan 6, 2016 |
| Vancanze di Pasqua | Mar 24, 2016 | Mar 29, 2016 |
| Anniversario della Liberazione | Apr 25, 2016 | Apr 25, 2016 |
| Festa del S. Patrono S. Zeno | May 21, 2016 | May 21, 2016 |
| Festa della Repubblica | Jun 2, 2016 | Jun 2, 2016 |
| Vacanze estive | Aug 8, 2016 | Aug 15, 2016 |
Exam calendar
Exam dates and rounds are managed by the relevant Science and Engineering Teaching and Student Services Unit.
To view all the exam sessions available, please use the Exam dashboard on ESSE3.
If you forgot your login details or have problems logging in, please contact the relevant IT HelpDesk, or check the login details recovery web page.
Should you have any doubts or questions, please check the Enrollment FAQs
Academic staff
+39 045 802 7980
mila.dallapreda@univr.it
Study Plan
The Study Plan includes all modules, teaching and learning activities that each student will need to undertake during their time at the University.
Please select your Study Plan based on your enrollment year.
1° Year
| Modules | Credits | TAF | SSD |
|---|
2° Year activated in the A.Y. 2016/2017
| Modules | Credits | TAF | SSD |
|---|
| Modules | Credits | TAF | SSD |
|---|
| Modules | Credits | TAF | SSD |
|---|
| Modules | Credits | TAF | SSD |
|---|
Due insegnamenti a sceltaLegend | Type of training activity (TTA)
TAF (Type of Educational Activity) All courses and activities are classified into different types of educational activities, indicated by a letter.
The Physics of Integrated Devices (2016/2017)
Teaching code
4S00034
Teacher
Coordinator
Credits
6
Language
Italian
Scientific Disciplinary Sector (SSD)
FIS/01 - EXPERIMENTAL PHYSICS
Period
I sem. dal Oct 3, 2016 al Jan 31, 2017.
Learning outcomes
The course introduces the physical principles of operation of semiconductor devices and logic gates made by the planar integrated circuit technology.
The students will be able to analyze and evaluate the behavior of physical systems that realize a device or implement a logical pattern and will be able to compare the different systems in terms of the physical parameters that characterize their behavior.
Program
In order to follow properly the lectures it is recommended to have already acquired knowledge on classical physics (laws of motion, work, energy, electric field, electric potential).
Covered topics:
Elements of Classical Physics and Atomic Physics: work and energy, electric field and potential, electric current, Ohm's law, linear circuits resistivity and temperature dependence in metals and semiconductors, the Bohr model, the periodic table of the elements
Crystal structure and electrical properties of metals, semiconductors and doped semiconductors: gas model of electrons in metals as a link model in semiconductors, concept of gap, doped semiconductors, nods to the band theory, conduction current and dissemination
P-n junction: non-polarized and polarized junction, ddp contact, voltage-current characteristic in forward and reverse bias, junction diode, Zener diode, OR / AND gates to diodes, switching times
Bipolar junction transistor BJT, input curves and in common emitter configuration output, common base, inverter, transfer rates characteristic and noise margins, switching times
Transitor in the field of JFET and MOSFET effect, manufacturing techniques, output and transfer curves, MOSFET and CMOS inverters, transfer characteristics, noise margins, switching times
Elementary digital circuits in MOS technology, CMOS, bipolar, ECL: NOR and NAND MOSFET and CMOS, NAND DTL, HTL, TTL, OR / NOR ECL
Comparison of logic families: propagation delay, power dissipation, fan-out, noise margins
Sensors and Applications
Examination Methods
The final test will be an oral exams on the topics covered in the lectures.
Type D and Type F activities
Documents and news
-
PIANO DIDATTICO LM-18 LM-32
(octet-stream, it, 18 KB, 21/09/18)
Modules not yet included
Career prospects
Module/Programme news
News for students
There you will find information, resources and services useful during your time at the University (Student’s exam record, your study plan on ESSE3, Distance Learning courses, university email account, office forms, administrative procedures, etc.). You can log into MyUnivr with your GIA login details: only in this way will you be able to receive notification of all the notices from your teachers and your secretariat via email and also via the Univr app.
Tutoring faculty members
Graduation
Deadlines and administrative fulfilments
For deadlines, administrative fulfilments and notices on graduation sessions, please refer to the Graduation Sessions - Science and Engineering service.
Need to activate a thesis internship
For thesis-related internships, it is not always necessary to activate an internship through the Internship Office. For further information, please consult the dedicated document, which can be found in the 'Documents' section of the Internships and work orientation - Science e Engineering service.
Final examination regulations
List of thesis proposals
Attendance modes and venues
As stated in the Teaching Regulations, attendance at the course of study is not mandatory.
Part-time enrolment is permitted. Find out more on the Part-time enrolment possibilities page.
The course's teaching activities take place in the Science and Engineering area, which consists of the buildings of Ca‘ Vignal 1, Ca’ Vignal 2, Ca' Vignal 3 and Piramide, located in the Borgo Roma campus.
Lectures are held in the classrooms of Ca‘ Vignal 1, Ca’ Vignal 2 and Ca' Vignal 3, while practical exercises take place in the teaching laboratories dedicated to the various activities.
