Studying at the University of Verona

Here you can find information on the organisational aspects of the Programme, lecture timetables, learning activities and useful contact details for your time at the University, from enrolment to graduation.

Study Plan

The Study Plan includes all modules, teaching and learning activities that each student will need to undertake during their time at the University.
Please select your Study Plan based on your enrollment year.

1° Year

ModulesCreditsTAFSSD
9
B
ING-INF/04
Compulsory activities for Embedded & Iot Systems
Compulsory activities for Robotics Systems
6
B/C
INF/01
6
B/C
ING-INF/05
Compulsory activities for Smart Systems & Data Analytics
6
B/C
INF/01 ,ING-INF/06
6
B/C
ING-INF/05

2° Year  activated in the A.Y. 2022/2023

ModulesCreditsTAFSSD
Compulsory activities for Embedded & Iot Systems
Compulsory activities for Robotics Systems
Compulsory activities for Smart Systems & Data Analytics
6
B/C
ING-INF/05
Final exam
24
E
-
ModulesCreditsTAFSSD
9
B
ING-INF/04
Compulsory activities for Embedded & Iot Systems
Compulsory activities for Robotics Systems
6
B/C
INF/01
6
B/C
ING-INF/05
Compulsory activities for Smart Systems & Data Analytics
6
B/C
INF/01 ,ING-INF/06
6
B/C
ING-INF/05
activated in the A.Y. 2022/2023
ModulesCreditsTAFSSD
Compulsory activities for Embedded & Iot Systems
Compulsory activities for Robotics Systems
Compulsory activities for Smart Systems & Data Analytics
6
B/C
ING-INF/05
Final exam
24
E
-
Modules Credits TAF SSD
Between the years: 1°- 2°
Between the years: 1°- 2°
Further activities
3
F
-
Between the years: 1°- 2°
Training
3
F
-

Legend | Type of training activity (TTA)

TAF (Type of Educational Activity) All courses and activities are classified into different types of educational activities, indicated by a letter.




S Placements in companies, public or private institutions and professional associations

Teaching code

4S009012

Credits

6

Coordinator

Nicola Bombieri

Language

English en

Also offered in courses:

Scientific Disciplinary Sector (SSD)

INF/01 - INFORMATICS

The teaching is organized as follows:

Parte II

Credits

3

Period

Semester 1

Academic staff

Nicola Bombieri

Parte I

Credits

3

Period

Semester 1

Academic staff

Nicola Bombieri

Learning objectives

The course aims at providing theoretical and practical knowledge about programming and analysis of advanced computing architectures, with emphasis on parallel and heterogeneous embedded platforms. At the end of the course the student will have to demonstrate the ability to apply the knowledge necessary to identify techniques for embedded software programming for edge computing, also in a research context, through analysis of application efficiency and by considering both functional and non-functional design constraints (correctness, performance, power consumption, energy efficiency). This knowledge will allow the student to analyze performance and perform code profiling, by identifying critical zone and the corresponding optimizations by considering the architectural characteristics of the platform. At the end of the course, the students will demonstrate the ability to compare parallel patterns for embedded software development and to select the best one by considering the use case. By defining the structure of the optimized code, the student will demonstrate the ability to identify the proper architectural choices, by considering the target application and platform contexts. Finally, the student will have to demonstrate the ability to continue the study autonomously in the field of the parallel programming languages and techniques for the software development for parallel and heterogeneous embedded platforms.

Prerequisites and basic notions

Basic programmoing in C

Program

Theory (32 h):
-) Intro to advanced computer architectures.
-) Parallel programming models and programming models for programmable edge devices.
-) Performance measurements and analysis, Amdhal law, metrics.
-) Power consumption and energy efficiency: programming models
-) Data-level parallelism: GPU e CPU-iGPU architectures
-) Pipeline: basic and advanced concepts
-) Instruction-level parallelism (ILP).
-) Branch prediction, static scheduling and speculation.
-) Memory hierarchy: basic and advanced concepts
-) Advanced techniques for cache performance optimization.
-) Thread-level parallelism (TLP).
-) Cache coherency in shared-memory architectures, Snoopy protocols.
-) Edge computing and Deep Learning at the edge

Lab (24 h):
-) Programming heterogeneous architectures (CPU-iGPU)
-) Parallel compilers for multi-core architectures
-) CNN-based inference and transfer learning at the edge

Bibliography

Visualizza la bibliografia con Leganto, strumento che il Sistema Bibliotecario mette a disposizione per recuperare i testi in programma d'esame in modo semplice e innovativo.

Didactic methods

Frontal lessons for theory
Frontal lessons and code development for lab

Learning assessment procedures

Exercises with open answers for theory, code development for lab. Total time: 2 or 2.5 h.

Students with disabilities or specific learning disorders (SLD), who intend to request the adaptation of the exam, must follow the instructions given HERE

Evaluation criteria

To pass the exam, the student has to demonstrate:
- he/she has understood the principles related to the advanced computer architecture programming
- he/she is able to describe the concepts in a clear and exhaustive way without digressions
- he/she is able to apply the acquired knowledge to solve application scenarios described by means of exercises, questions and projects.

Criteria for the composition of the final grade

The exam consists of a written test, which contains questions with multiple answers, questions with open answers, and exercises related both the theoretical and lab modules. The student can elaborate a project assigned by the teacher for a bonus (up to +5 points).

Exam language

English