Studying at the University of Verona
Here you can find information on the organisational aspects of the Programme, lecture timetables, learning activities and useful contact details for your time at the University, from enrolment to graduation.
Academic calendar
The academic calendar shows the deadlines and scheduled events that are relevant to students, teaching and technical-administrative staff of the University. Public holidays and University closures are also indicated. The academic year normally begins on 1 October each year and ends on 30 September of the following year.
Course calendar
The Academic Calendar sets out the degree programme lecture and exam timetables, as well as the relevant university closure dates..
Period | From | To |
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I semestre | Oct 3, 2011 | Jan 31, 2012 |
II semestre | Mar 1, 2012 | Jun 15, 2012 |
Session | From | To |
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Sessione straordinaria | Feb 1, 2012 | Feb 29, 2012 |
Sessione estiva | Jun 18, 2012 | Jul 31, 2012 |
Sessione autunnale | Sep 3, 2012 | Sep 28, 2012 |
Session | From | To |
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Sessione autunnale | Oct 20, 2011 | Oct 20, 2011 |
Sessione straordinaria | Dec 14, 2011 | Dec 14, 2011 |
Sessione invernale | Mar 22, 2012 | Mar 22, 2012 |
Sessione estiva | Jul 17, 2012 | Jul 17, 2012 |
Period | From | To |
---|---|---|
Festa di Ognissanti | Nov 1, 2011 | Nov 1, 2011 |
Festa dell'Immacolata Concezione | Dec 8, 2011 | Dec 8, 2011 |
Vacanze Natalizie | Dec 22, 2011 | Jan 6, 2012 |
Vacanze Pasquali | Apr 5, 2012 | Apr 10, 2012 |
Festa della Liberazione | Apr 25, 2012 | Apr 25, 2012 |
Festa del Lavoro | May 1, 2012 | May 1, 2012 |
Festa del Patrono di Verona S. Zeno | May 21, 2012 | May 21, 2012 |
Festa della Repubblica | Jun 2, 2012 | Jun 2, 2012 |
Vacanze estive | Aug 8, 2012 | Aug 15, 2012 |
Exam calendar
Exam dates and rounds are managed by the relevant Science and Engineering Teaching and Student Services Unit.
To view all the exam sessions available, please use the Exam dashboard on ESSE3.
If you forgot your login details or have problems logging in, please contact the relevant IT HelpDesk, or check the login details recovery web page.
Academic staff
Study Plan
The Study Plan includes all modules, teaching and learning activities that each student will need to undertake during their time at the University.
Please select your Study Plan based on your enrollment year.
1° Year
Modules | Credits | TAF | SSD |
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2° Year activated in the A.Y. 2012/2013
Modules | Credits | TAF | SSD |
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Tre insegnamenti a scelta tra i seguenti
Modules | Credits | TAF | SSD |
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Modules | Credits | TAF | SSD |
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Tre insegnamenti a scelta tra i seguenti
Modules | Credits | TAF | SSD |
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Legend | Type of training activity (TTA)
TAF (Type of Educational Activity) All courses and activities are classified into different types of educational activities, indicated by a letter.
The Physics of Integrated Devices (2012/2013)
Teaching code
4S00034
Teacher
Coordinator
Credits
6
Language
Italian
Scientific Disciplinary Sector (SSD)
FIS/01 - EXPERIMENTAL PHYSICS
Period
I semestre dal Oct 1, 2012 al Jan 31, 2013.
Learning outcomes
Aim of the course is to give knowledge of the physics of semiconductor devices (p-n junction, MOSFET, CMOS; BJT) and related logic gates. The student will be able to compare various logic families in terms of their physical characteristics and performances.
Program
Recall of Classical and Atomic Physics: work and energy, electric field, potential and potential energy, electric current, Ohm's law, linear circuits, resistivity and temperature dependence in metals and semiconductors, Bohr atom, table of elements
Crystal structure and electric conduction in metals and semiconductors: electron gas model of metals, conduction current in metals; covalent bond in semiconductors and the concept of hole, doped semiconductors, band theory, conduction and diffusion current in semiconductors
p-n junction: polarized and non polarized junction, I-V characteristics in direct and reverse polarization for Si and Ge, breakdown, junction diode, Zener diodes, OR/AND gates with diodes, commutation time
FET transistors: enrichment and depletion MOSFET, NMOS and PMOS. MOSFET inverters, CMOS, noise margins and commutation times
BJT transistors and RTL inverter: common emitter configuration, RTL inverter, noise margins, commutation times
Elementary digital circuits: basic gates in MOS and bipolar technologies: NOR and NAND MOS, NOR and NAND CMOS, NAND DTL, NAND HTL, NAND TTL; OR/NOR ECL
Comparison of logic families: propagation delay, power dissipation, noise margins, fan-out
Laboratory activities: logic gates study and characterization by Spice
Examination Methods
Oral
Type D and Type F activities
Documents and news
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SE1 - Curriculum Sistemi Embedded: presentazione (Embedded systems: curriculum presentation) (pdf, en, 873 KB, 25/01/12)
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SE2 - Curriculum Sistemi Embedded: formazione (Embedded Systems: programme) (pdf, it, 212 KB, 25/01/12)
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SE3 - Curriculum Sistemi Embedded: ricerca avanzata (Embedded Systems: research) (pdf, it, 641 KB, 25/01/12)
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SE4 - Curriculum Sistemi Embedded: esempi reali (Embedded Systems: practical cases) (pdf, it, 1046 KB, 25/01/12)
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SE5 - Curriculum Sistemi Embedded: relazioni aziendali (Embedded Systems: cooperations with companies) (pdf, it, 1941 KB, 25/01/12)
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SWE&S1 - Curriculum Ingegneria del Software e sicurezza: presentazione (Ingegneria del Software e sicurezza: curriculum presentation) (pdf, it, 11261 KB, 11/04/12)
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SWE&S2 - Curriculum Ingegneria del Software e sicurezza: ricerca avanzata (Ingegneria del Software e sicurezza: research)) (pdf, it, 4044 KB, 11/04/12)
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SWE&S3 - Curriculum Ingegneria del Software e sicurezza: relazioni aziendali (Ingegneria del Software e sicurezza: collaborations with companies) (pdf, it, 2764 KB, 11/04/12)
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VC1 - Curriculum Visual Computing: didattica (pdf, it, 1979 KB, 08/03/12)
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VC2 - Curriculum Visual Computing: ricerca (pdf, it, 3299 KB, 08/03/12)
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VC3 - Curriculum Visual Computing: aziende (pdf, it, 1907 KB, 08/03/12)
Modules not yet included
Career prospects
Module/Programme news
News for students
There you will find information, resources and services useful during your time at the University (Student’s exam record, your study plan on ESSE3, Distance Learning courses, university email account, office forms, administrative procedures, etc.). You can log into MyUnivr with your GIA login details: only in this way will you be able to receive notification of all the notices from your teachers and your secretariat via email and also via the Univr app.
Tutoring faculty members
Graduation
Deadlines and administrative fulfilments
For deadlines, administrative fulfilments and notices on graduation sessions, please refer to the Graduation Sessions - Science and Engineering service.
Need to activate a thesis internship
For thesis-related internships, it is not always necessary to activate an internship through the Internship Office. For further information, please consult the dedicated document, which can be found in the 'Documents' section of the Internships and work orientation - Science e Engineering service.
Final examination regulations
List of thesis proposals
Attendance modes and venues
As stated in the Teaching Regulations, attendance at the course of study is not mandatory.
Part-time enrolment is permitted. Find out more on the Part-time enrolment possibilities page.
The course's teaching activities take place in the Science and Engineering area, which consists of the buildings of Ca‘ Vignal 1, Ca’ Vignal 2, Ca' Vignal 3 and Piramide, located in the Borgo Roma campus.
Lectures are held in the classrooms of Ca‘ Vignal 1, Ca’ Vignal 2 and Ca' Vignal 3, while practical exercises take place in the teaching laboratories dedicated to the various activities.