Studying at the University of Verona

Here you can find information on the organisational aspects of the Programme, lecture timetables, learning activities and useful contact details for your time at the University, from enrolment to graduation.

The Study Plan includes all modules, teaching and learning activities that each student will need to undertake during their time at the University.
Please select your Study Plan based on your enrollment year.

2° Year  activated in the A.Y. 2018/2019

ModulesCreditsTAFSSD
12
B
INF/01
6
C
BIO/18

3° Year  activated in the A.Y. 2019/2020

ModulesCreditsTAFSSD
One course to be chosen among the following
Other activitites
3
F
-
Final exam
3
E
-
activated in the A.Y. 2019/2020
ModulesCreditsTAFSSD
One course to be chosen among the following
Other activitites
3
F
-
Final exam
3
E
-

Legend | Type of training activity (TTA)

TAF (Type of Educational Activity) All courses and activities are classified into different types of educational activities, indicated by a letter.




S Placements in companies, public or private institutions and professional associations

Teaching code

4S02717

Credits

12

Coordinator

Tiziano Villa

Language

Italian

Scientific Disciplinary Sector (SSD)

ING-INF/05 - INFORMATION PROCESSING SYSTEMS

The teaching is organized as follows:

Teoria

Credits

9

Period

I semestre

Academic staff

Tiziano Villa

Laboratorio

Credits

3

Period

II semestre

Academic staff

Nicola Drago

Learning outcomes

Knowledge and understanding: students wiil learn the theory and practice to realize an algorithm in hardware, exploring a spectrum of options ranging from dedicated specialized devices to programs on a general-purpose processor; they will understand how a processor works and how an high-level program is translated into machine language and then executed; they will understand the organization of a computer system and of the operating systems running on it, with the related issues of correctness and efficiency.

Capabilities to apply knowledge and understanding: the students will be able to design specialized hardware for simple algorithms; translate simple programs from an high-level specification to machine language; write shell scripts using system calls in C in the UNIX environment; manage an information system, especially for what the installation and maintenance of applications and resources is concerned.

Program

Computer Architecture.

Fundamentals: information coding, Boolean functions, arithmetic.

Digital design: combinational circuits, sequential circuits, special purpose architectures (control unit + data path), programmable units.

Computer architecture: basic principles, instruction set, processor, memory hierarchy, I/O organization.

Practical exercises: assembly programming of LC-3 architecture.


Operating systems.

Evolution and role of the operating system. Architectural concepts. Organization and functionality of an operating system.

Process Management: Processes. Process status. Context switch. Process creation and termination. Thread. User-level threads and kernel-level threads. Process cooperation and communication: shared memory, messages. Direct and indirect communication.

Scheduling: CPU and I/O burst model. Long term, short term and medium term scheduling. Preemption. Scheduling criteria. Scheduling algorithm: FCFS, SJF, priority-based, RR, HRRN, multiple queues with and without feedback. Algorithm evaluation: deterministic and probabilistic models, simulation.

Process synchronization: data coherency, atomic operations. Critical sections. SW approaches for mutual exclusion: Peterson and Dekker's algorithms, baker's algorithm. HW for mutual exclusion: test and set, swap. Synchronization constructs: semaphores, mutex, monitor.

Deadlock: Deadlock conditions. Resource allocation graph. Deadlock prevention. Deadlock avoidance. Banker's algorithm. Deadlock detection e recovery.

Memory management: Main memory. Logical and physical addressing. Relocation, address binding. Swapping. Memory allocation. Internal and external fragmentation. Paging. HW for paging: TLB. Page table. Multi-level paging. Segmentation. Segment table. Segmentation with paging.

Virtual memory: Paging on demand. Page fault management. Page substitution algorithms: FIFO, optimal, LRU, LRU approximations. Page buffering. Frame allocation: local and global allocation. Thrashing. Working set model. Page fault frequency.

Secondary memory. Logical and physical structure of disks. Latency time. Disk scheduling algorithms: FCFS, SSTF, SCAN, C-SCAN, LOOK, C-LOOK. RAID.

File System: file, attributes and related operation. File types. Sequential and direct access. Directory structure. Access permissions and modes. Consistency semantics. File system structure. File system mounting. Allocation techniques: adjacent, linked, indexed. Free space management: bit vector, lists. Directory implementation: linear list, hash table.

I/O subsystem: I/O Hardware. I/O techniques: programmed I/O, interrupt, DMA. Device driver and application interface. I/O kernel services: scheduling, buffering, caching, spooling.

Practical exercises: system-level and shell programming with C.

Bibliography

Reference texts
Activity Author Title Publishing house Year ISBN Notes
Teoria R.Katz, G.Borriello Contemporary logic design (Edizione 2) Pearson Education International 2005 0-13-127830-4
Teoria Franco Fummi, Mariagiovanna Sami, Cristina Silvano Progettazione Digitale (Edizione 2) McGraw-Hill 2007 8838663521

Examination Methods

Written test for the theoretical part with questions and exercises (3/4 of the final grade).
Programming projects and written test for the laboratory (1/4 of final grade).

Students with disabilities or specific learning disorders (SLD), who intend to request the adaptation of the exam, must follow the instructions given HERE

Teaching materials e documents